1. Field of the Invention
The present invention relates to a technique for mounting an electronic part, e.g., a semiconductor laser element, in a recessed portion of a substrate and, more particularly, to ah electronic parts mounting apparatus utilizing mechanical self-alignment and a method of mounting electronic parts.
2. Description of the Related Art
Mechanical position alignment is needed in IC element flip chip mounting, optical axis adjustment of an optical semiconductor element for optical communication, and the like. Particularly, in optical axis adjustment and the like of an optical fiber array and an optical element array, a total of 6 axes comprising X-, Y-, and Z-axes and rotational axes (.theta..sub.X, .theta..sub.Y, and .theta..sub.Z) corresponding thereto need be adjusted. Such a mechanical alignment step requires a large amount of labor in obtaining and maintaining an alignment precision, and time required for alignment causes an extra cost. Therefore, simplified mechanical alignment, especially self-alignment is strongly demanded.
In the manufacture of a lower-profile IC card, a method is practiced in which an element is fitted in a hole of a substrate and the entire structure is molded with a resin. With this method, however, since only the resin supports the element, the mechanical strength is low.
A structure is known in which a flat waveguide material is formed on an Si substrate and functional portions of the flat waveguide and holder portions are collectively formed by photolithography. For this purpose, a method is employed which enables mounting in a self-alignment manner by accurately aligning the optical axes of the waveguide and the holder portions and fitting a light-emitting element and a spherical lens in the corresponding holder portions.
Although this method enables self-alignment in principle, sufficient self-alignment is not yet enabled in practice.
When almost ideal assembly is performed by this method, to perform complete self-alignment, the clearance is preferably zero. In practice, however, the clearance must be small by considering upward warp and the like due to the thermal expansion coefficients of the respective members and solder capillarity.
Conventionally, mounting and assembly as described above are performed by stationarily holding a substrate, holding a semiconductor element by vacuum chucking or the like and moving the chucked semiconductor element, and mounting the semiconductor element on the substrate. However, the clearance largely influences the yield of the assembly. That is, when the clearance is as small as 10 to 20 .mu.m, it is difficult to insert the semiconductor element in the holder portion. Therefore, the semiconductor element is caught to be inclined or cracked. When the clearance is small, even if catching of the semiconductor element does not occur, the holder portion and a side surface of the semiconductor element often locally contact so as to be stopped by each other, causing a local stress. As a result, when the clearance is small, although the alignment precision can be easily improved, the yield in assembly tends to be decreased and reliability of the semiconductor element after mounting tends to be degraded.
On the other hand, when the clearance is set large (e.g., 50 to 100 .mu.m) in order to avoid catching of the semiconductor element or local contact thereof with the holder portion, the precise self-alignment as the initial object becomes difficult. That is, when the clearance is large, the assembly alignment of the semiconductor element and the holder portion bears an error corresponding to the clearance at maximum, and the semiconductor element mounting angle (inclination of the element within the mounting plane) also easily bears an error. Hence, to increase the clearance between the semiconductor element and the holder portion is equivalent to render the self-alignment technique meaningless.
Even when the optimization of the clearance is performed by considering these two contradicting problems, the self-alignment still has a problem in view of precision. That is, when the clearance is set at, e.g., 30 to 40 .mu.m, the alignment precision has a maximum error of .+-.15 to 20 .mu.m, and thus it is difficult to apply this clearance to assembly of an optical fiber and a light-emitting element that allows an error of, e.g., .+-.2 to 5 .mu.m in the case of a single mode fiber. An error in self-alignment should be .+-.5 .mu.m or less considering the case of a light-emitting element and an optical fiber as well.
As described above, when the clearance between an electronic part, e.g., a semiconductor element, and a recessed portion of a substrate is set large, it is difficult to realize self-alignment; when the clearance is set small, the yield of assembly is decreased and reliability of the electronic part after mounting is degraded.
It is very important to mount a semiconductor element at an accurate position in a module, and it is strongly needed to overcome difficulties accompanying it. A method in which an element is buried in a hole of a substrate and molded with a resin in order to fabricate a low-profile device, has a low mechanical strength. A strong demand has arisen for increasing the mechanical strength.
Published Unexamined Japanese Patent Application Nos. 54-18692 and 61-87113 disclose known techniques associated with the present invention.